The present invention generally relates to a logic circuit using an element having a negative differential conductance, such as a resonant-tunneling hot electron transistor (RHET) or a resonant-tunneling bipolar transistor (RBT). More specifically, the present invention is concerned with a majority logic circuit.
A majority logic circuit is used in logic circuits, particularly, adders. An addition operation on two numerals A and B is carried out in a digit unit. The binary values Ai and Bi of the i-th digit and a carry bit Ci-1 propagated from the (i-1)th digit are added. A full adder provided for each digit is composed of a three-input exclusive-OR circuit and a three-input majority logic circuit. The binary values Ai and Bi and the carry bit Ci-1 are input to the three-input exclusive-OR circuit and the three-input majority logic circuit. The three-input exclusive-OR circuit outputs a sum signal S, and the three-input majority logic circuit generates a carry signal Ci on the basis of a majority logic.
The majority logic is as follows. When the number of high-level inputs is greater than that of low-level inputs, the result of the majority logic is a high level. On the other hand, when the number of low-level inputs is greater than that of high-level inputs, the result of the majority logic is a low level. The addition operation on the binary values A, B and C generates a carry of 1 when at least two of the binary values A, B and C are equal to 1, and generates a carry of 0 when only one of the binary values A, B and C is equal to 1 or all of them are zero.
The three-input majority logic employed in the full adder is written as follows: EQU Q=AB+BC+CA
where Q is the result of the majority logic. Thus, it is possible to implement the three-input majority logic by three two-input NAND circuits and a single three-input NAND circuit, or by three two-input NOR circuits and a single three-input NOR circuit. It is also known a three-input majority logic circuit formed of ECL circuits (see M. Suzuki et al., "GATE ARRAYS", 1988 IEEE International Solid-State Circuits Conference, ISSCC 88, Wednesday, Feb. 17, 1988, pp. 70-71).
However, the above-mentioned conventional three-input majority logic circuit needs a large number of transistors.